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Autor Clemente Barreira, Juan Antonio |
Documentos disponibles escritos por este autor (39)
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Botella Juan, Guillermo ; Barrio García, Alberto Antonio Del ; García Sanchez, Carlos ; Clemente Barreira, Juan Antonio ; Bernabé García, Sergio ; Roa Romero, Carlos ; Ahmed Fahmy Amin, Hesham ; Ezquerro Rodríguez, José Miguel ; Cao García, Francisco Javier ; Sierra López, Angel | 2019-08-01Los objetivos alcanzados en el proyecto han sido: I) Continuar la preparación del framework de desarrollo rápido de código VHDL sobre FPGAs de Altera a partir de código Matlab y del entorno gráfico Simulink realizado en el proyecto ALLIANCE (PID[...]![]()
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Ramezani, Reza ; Sedaghat, Yasser ; Clemente Barreira, Juan Antonio | The Institute of Electrical and Electronics Engineers (IEEE) | 2017-04This study presents a technique to improve the reliability and the Mean Time to Failure (MTTF) of hardware task graphs running on reconfigurable computers. This tech- nique, which has been named Task Early-fetch, can be applied to a sequence of [...]![]()
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Clemente Barreira, Juan Antonio ; Mozos Muñoz, Daniel ; Resano, Javier | 2011-09-01Dynamically reconfigurable hardware is a promising technology that combines in the same device both the high performance and the flexibility that many recent applications demand. However, one of its main drawbacks is the reconfiguration overhead[...]![]()
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Clemente Barreira, Juan Antonio ; Hubert, Guillaume ; Franco Peláez, Francisco Javier ; Vila, Francesca ; Baylac, Maud ; Puchner, Helmut ; Velazco, Raoul ; Mecha López, Hortensia | IEEE-Inst Electrical Electronics Engineers Inc | 2017-08-01This paper presents the characterization of the sensitivity to 14-MeV neutrons of a Commercial Off-The-Shelf (COTS) 90-nm Static Random Access Memories (SRAMs) manufactured by Cypress Semiconductor, when biased at ultra low voltage. Firstly, exp[...]![]()
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Clemente Barreira, Juan Antonio ; Hubert, Guilaume ; Fraire, Juan ; Franco Peláez, Francisco Javier ; Villa, Francesca ; Rey, Solenne ; Baylac, Maud ; Puchner, Helmut ; Mecha, Hortensia ; Velazco, Raoul | IEEE-Inst Electrical Electronics Engineers Inc | 2018-02-01This paper presents a SEU sensitivity characterization at ultra-low bias voltage of three generations of COTS SRAMs manufactured in 130 nm, 90 nm and 65 nm CMOS processes. For this purpose, radiation tests with 14.2 MeV neutrons were performed f[...]![]()
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Fabero Jiménez, Juan Carlos ; Mecha López, Hortensia ; Franco Peláez, Francisco Javier ; Clemente Barreira, Juan Antonio ; Korkian, Golnaz ; Rey, Solenne ; Cheymol, Benjamin ; Baylac, Maud ; Hubert, Guillaume ; Velazco, Raoul | IEEE-Inst Electrical Electronics Engineers Inc | 2020A sensitivity characterization of a Xilinx Artix-7 FPGA against 14.2 MeV neutrons is presented. The content of the internal SRAMs and flip-flops were downloaded in a PC and compared with a golden version of it. Flipped cells were identified and [...]![]()
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Clemente Barreira, Juan Antonio ; Franco Peláez, Francisco Javier ; Villa, Francesca ; Baylac, Maud ; Ramos Vargas, Pablo Francisco ; Vargas Vallejo, Vanessa Carolina ; Mecha López, Hortensia ; Agapito Serrano, Juan Andrés ; Velazco, Raoul | IEEE-Inst Electrical Electronics Engineers Inc | 2016-08-16This paper presents an experimental study of the sensitivity to 15-MeV neutrons of Advanced Low Power SRAMs (A-LPSRAM) at low bias voltage little above the threshold value that allows the retention of data. This family of memories is characteri[...]![]()
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Clemente Barreira, Juan Antonio ; Franco Peláez, Francisco Javier ; Villa, Francesca ; Rey, Sole ; Baylac, Maud ; Mecha López, Hortensia ; Agapito Serrano, Juan Andrés ; Puchner, Helmut ; Hubert, Guillaume ; Velazco, Raoul | IEEE-Inst Electrical Electronics Engineers Inc | 2015-09-18This paper presents an approach to discern MCUs from SEUs in SRAM memories. Experiments involving radiation tests with 14-MeV neutrons on two successive generations (130 and 90 nm) of Cypress devices are presented.![]()
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Clemente Barreira, Juan Antonio ; Franco Peláez, Francisco Javier ; Villa, Francesca ; Baylac, Maud ; Rey, Solenne ; Mecha López, Hortensia ; Agapito Serrano, Juan Andrés ; Puchner, Helmut ; Hubert, Guillaume ; Velazco, Raoul | IEEE | 2016-08Recently, the occurrence of multiple events in static tests has been investigated by checking the statistical distribution of the difference between the addresses of the words containing bitflips. That method has been successfully applied to Fie[...]![]()
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Franco Peláez, Francisco Javier ; Clemente Barreira, Juan Antonio ; Baylac, Maud ; Rey, Solenne ; Villa, Francesca ; Mecha López, Hortensia ; Agapito Serrano, Juan Andrés ; Puchner, Helmut ; Hubert, Guillaume ; Velazco, Raoul | IEEE-Inst Electrical Electronics Engineers Inc | 2017-08-01This paper addresses a well-known problem that occurs when memories are exposed to radiation: the determination if a bitflip is isolated or if it belongs to a multiple event. As it is unusual to know the physical layout of the memory, this paper[...]![]()
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Serrano, Felipe ; Clemente Barreira, Juan Antonio ; Mecha López, Hortensia | 2014-10-30In this paper we present an experimental validation of the reliability increase of digital circuits implemented in XilinxTMFPGAs when they are implemented using the DSPs (Digital Signal Processors) that are available in the reconfigurable device[...]![]()
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Clemente Barreira, Juan Antonio ; González Calvo, Carlos ; Resano, Javier ; Mozos Muñoz, Daniel | Elsevier | 2010-03Reconfigurable hardware can be used to build multi tasking systems that dynamically adapt themselves to the requirements of the running applications. This is especially useful in embedded systems, since the available resources are very limited a[...]![]()
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Clemente Barreira, Juan Antonio | Universidad Complutense de Madrid, Servicio de Publicaciones | 2011-05-16El principal objetivo de esta tesis es reducir, el impacto de las reconfiguraciones generadas por la ejecución de tareas en sistemas reconfigurables utilizados en entornos altamente dinámicos. Para ello, este trabajo propone un algoritmo de plan[...]![]()
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Botella Juan, Guillermo ; Del Barrio García, Alberto ; Clemente Barreira, Juan Antonio ; López Alonso, José Manuel ; Ezquerro Rodríguez, José Miguel ; Piquer Otero, Andrés ; Carrascal de la Heras, Ginés ; Roa Romero, Carlos ; Mas Aguilar, Juan ; Fahmy Amin, Hesham Ahmed ; García Moreno, Daniel ; Aguilera Calle, Iván ; Sierra López, Angel ; Cao García, Francisco Javier | 2020-07-21Desarrollar un intérprete de signos en tiempo real mediante técnicas de aprendizaje profundo, aceleradores y procesado de video inteligente con objeto de desarrollar tiflotecnología barata, portable y accesible para toda la universidad.