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González Calvo, Carlos ; Bernabé García, Sergio ; Mozos Muñoz, Daniel ; Mecha López, Hortensia ; Mendías Cuadros, José Manuel | 2020-10-02Actualmente, las prácticas de laboratorio de diseño digital de la asignatura de Fundamentos de Computadores (que cuenta con más de 500 estudiantes), se realizan sobre entrenadores digitales fijos de alto coste. Esto conlleva a que los estudiante[...]texto impreso
Fabero Jiménez, Juan Carlos ; Mendías Cuadros, José Manuel ; Mecha López, Hortensia ; González Calvo, Carlos ; Clemente Barreira, Juan Antonio | 2015-02-11Se plantea la adaptación y ampliación de la placa de periféricos desarrollada el curso anterior para su uso en otras asignaturas impartidas en nuestra Facultad, como son "Sistemas Empotrados Distribuidos" y "Programación de Sistemas y Dispositiv[...]texto impreso
Rezaei, Mohammadreza ; Martín Holgado, Pedro ; Morilla, Yolanda ; Franco Peláez, Francisco Javier ; Fabero Jiménez, Juan Carlos ; Mecha López, Hortensia ; Puchner, Helmut ; Hubert, Guillaume ; Clemente Barreira, Juan Antonio | IEEE-Inst Electrical Electronics Engineers Inc | 2020-10This article presents an experimental study on the sensitivity of a commercial-off-the-shelf (COTS) bulk 65-nm static random access memory (SRAM) under 15.6 MeV proton irradiation when powered up at ultralow bias voltage. Tests were run on stand[...]texto impreso
Clemente Barreira, Juan Antonio ; Mansour, Wassim ; Ayoubi, Rafic ; Serrano, Felipe ; Mecha López, Hortensia ; Ziade, Haissam ; El Falou, Wassim ; Velazco, Raoul | Elsevier | 2016-01-01This letter presents an FPGA implementation of a fault-tolerant Hopfield NeuralNetwork (HNN). The robustness of this circuit against Single Event Upsets (SEUs) and Single Event Transients (SETs) has been evaluated. Results show the fault toleran[...]texto impreso
Franco Peláez, Francisco Javier ; Clemente Barreira, Juan Antonio ; Mecha López, Hortensia ; Velazco, Raoul | IEEE | 2019-03-01After having carried out radiation experiments on memories, the detected bitflips must be classified into single bit upsets and multiple events to calculate the cross sections of different phenomena. There are some accepted procedures to determi[...]texto impreso
Franco Peláez, Francisco Javier ; Clemente Barreira, Juan Antonio ; Korkian, Golnaz ; Fabero Jiménez, Juan Carlos ; Mecha López, Hortensia ; Velazco, Raoul | IEEE-Inst Electrical Electronics Engineers Inc | 2020In radiation tests on SRAMs or FPGAs, two or more independent bitflips can be misled with a multiple event if they accidentally occur in neighbor cells. In the past, different tests such as the ``birthday statistics'' have been proposed to estim[...]texto impreso
This paper presents a methodology to emulate Single Event Upsets (SEUs) in FPGA flip-flops (FFs). Since the content of a FF is not modifiable through the FPGA configuration memory bits, a dedicated design is required for fault injection in the F[...]texto impreso
Clemente Barreira, Juan Antonio ; Franco Peláez, Francisco Javier ; Vila, Francesca ; Baylac, Maud ; Ramos Vargas, Pablo Francisco ; Vargas Vallejo, Vanessa Carolina ; Mecha López, Hortensia ; Agapito Serrano, Juan Andrés ; Velazco, Raoul | IEEE-Inst Electrical Electronics Engineers Inc | 2015-09-18This paper presents an experimental study of the sensitivity to 15-MeV neutrons at low bias voltage of advanced low-power SRAMs by Renesas Electronics. The most interesting results are the occurrence of clusters of bitflips, hard errors only vis[...]texto impreso
Clemente Barreira, Juan Antonio ; Hubert, Guillaume ; Franco Peláez, Francisco Javier ; Vila, Francesca ; Baylac, Maud ; Puchner, Helmut ; Velazco, Raoul ; Mecha López, Hortensia | IEEE-Inst Electrical Electronics Engineers Inc | 2017-08-01This paper presents the characterization of the sensitivity to 14-MeV neutrons of a Commercial Off-The-Shelf (COTS) 90-nm Static Random Access Memories (SRAMs) manufactured by Cypress Semiconductor, when biased at ultra low voltage. Firstly, exp[...]texto impreso
Fabero Jiménez, Juan Carlos ; Mecha López, Hortensia ; Franco Peláez, Francisco Javier ; Clemente Barreira, Juan Antonio ; Korkian, Golnaz ; Rey, Solenne ; Cheymol, Benjamin ; Baylac, Maud ; Hubert, Guillaume ; Velazco, Raoul | IEEE-Inst Electrical Electronics Engineers Inc | 2020A sensitivity characterization of a Xilinx Artix-7 FPGA against 14.2 MeV neutrons is presented. The content of the internal SRAMs and flip-flops were downloaded in a PC and compared with a golden version of it. Flipped cells were identified and [...]texto impreso
Clemente Barreira, Juan Antonio ; Franco Peláez, Francisco Javier ; Villa, Francesca ; Baylac, Maud ; Ramos Vargas, Pablo Francisco ; Vargas Vallejo, Vanessa Carolina ; Mecha López, Hortensia ; Agapito Serrano, Juan Andrés ; Velazco, Raoul | IEEE-Inst Electrical Electronics Engineers Inc | 2016-08-16This paper presents an experimental study of the sensitivity to 15-MeV neutrons of Advanced Low Power SRAMs (A-LPSRAM) at low bias voltage little above the threshold value that allows the retention of data. This family of memories is characteri[...]texto impreso
Clemente Barreira, Juan Antonio ; Franco Peláez, Francisco Javier ; Villa, Francesca ; Rey, Sole ; Baylac, Maud ; Mecha López, Hortensia ; Agapito Serrano, Juan Andrés ; Puchner, Helmut ; Hubert, Guillaume ; Velazco, Raoul | IEEE-Inst Electrical Electronics Engineers Inc | 2015-09-18This paper presents an approach to discern MCUs from SEUs in SRAM memories. Experiments involving radiation tests with 14-MeV neutrons on two successive generations (130 and 90 nm) of Cypress devices are presented.texto impreso
Clemente Barreira, Juan Antonio ; Franco Peláez, Francisco Javier ; Villa, Francesca ; Baylac, Maud ; Rey, Solenne ; Mecha López, Hortensia ; Agapito Serrano, Juan Andrés ; Puchner, Helmut ; Hubert, Guillaume ; Velazco, Raoul | IEEE | 2016-08Recently, the occurrence of multiple events in static tests has been investigated by checking the statistical distribution of the difference between the addresses of the words containing bitflips. That method has been successfully applied to Fie[...]texto impreso
Franco Peláez, Francisco Javier ; Clemente Barreira, Juan Antonio ; Baylac, Maud ; Rey, Solenne ; Villa, Francesca ; Mecha López, Hortensia ; Agapito Serrano, Juan Andrés ; Puchner, Helmut ; Hubert, Guillaume ; Velazco, Raoul | IEEE-Inst Electrical Electronics Engineers Inc | 2017-08-01This paper addresses a well-known problem that occurs when memories are exposed to radiation: the determination if a bitflip is isolated or if it belongs to a multiple event. As it is unusual to know the physical layout of the memory, this paper[...]texto impreso
Serrano, Felipe ; Clemente Barreira, Juan Antonio ; Mecha López, Hortensia | 2014-10-30In this paper we present an experimental validation of the reliability increase of digital circuits implemented in XilinxTMFPGAs when they are implemented using the DSPs (Digital Signal Processors) that are available in the reconfigurable device[...]
