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Título:
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A power-efficient and scalable load-store queue design
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Autores:
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Castro, F. ;
Chaver Martínez, Daniel Ángel ;
Piñuel Moreno, Luis ;
Prieto Matías, Manuel ;
Huang, M. C. ;
Tirado Fernández, Francisco
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Tipo de documento:
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texto impreso
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Editorial:
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SPRINGER-VERLAG BERLIN, 2005
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Dimensiones:
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application/pdf
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Nota general:
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info:eu-repo/semantics/openAccess
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Idiomas:
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Palabras clave:
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Estado = Publicado
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Materia = Ciencias: Informática
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Materia = Ciencias: Informática: Programación de ordenadores
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Tipo = Sección de libro
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Resumen:
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The load-store queue (LQ-SQ) of modem superscalar processors is responsible for keeping the order of memory operations. As the performance gap between processing speed and memory access becomes worse, the capacity requirements for the LQ-SQ increase, and its design becomes a challenge due to its CAM structure. In this paper we propose an efficient load-store queue state filtering mechanism that provides a significant energy reduction (on average 35% in the LSQ and 3.5% in the whole processor), and only incurs a negligible performance loss of less than 0.6%.
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En línea:
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https://eprints.ucm.es/id/eprint/29749/1/pi%C3%B1uel17preprint.pdf
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